In circuits such as op-amps, it may be desirable to limit the rate of change (or slew rate) in a signal to reduce or prevent distortions in the signal. To do so, the circuit may detect when a signal may be changing (increasing or decreasing) too quickly, and adjust the signal (for example, by reducing the amplitude) to limit the slew rate of the signal.
At lower clock speeds, slew rate may be easily limited, because the low clock speed signal may be detected and adjusted by a slew rate limiting circuit running at relatively higher clock speed. However, as the clock speed of the signals sought to be slew rate limited increases in new technologies, such as in high speed wireless transmitters and receivers, it may become increasingly difficult to implement higher clock speeds for slew rate limiting circuits. Complex slew rate limiting circuits may lose signal integrity and fidelity at high clock speeds.
Thus, there is a need for improved slew rate limiting circuit capable of good performance for a high speed signal with minimal loss of signal integrity.